SH7261 datasheet(779/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 17 I

2C Bus Interface 3 (IIC3)

Rev. 2.00 Sep. 07, 2007 Page 747 of 1312

REJ09B0320-0200

17.3.10

NF2CYC Register (NF2CYC)

NF2CYC is an 8-bit readable/writable register that selects the range of the noise filtering for the

SCL and SDA pins. For details of the noise filter, see section 17.4.7, Noise Filter.

NF2CYC is initialized to H'02 by a power-on reset or in deep standby mode.

Bit:

Initial value:

R/W:

———————

R/W

NF2

CYC

Bit

Bit Name

Initial

Value

R/W

Description

7 to 2



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.



Reserved

This bit is always read as 0. The write value should

always be 1.

NF2CYC

R/W

Noise Filtering Range Select

0: The noise less than one cycle of the peripheral clock

can be filtered out

1: The noise less than two cycles of the peripheral clock

can be filtered out

SH7261 Datasheet(PDF) 779 Page - Renesas Technology Corp