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SH7261 Datasheet(PDF) 827 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 827 Page - Renesas Technology Corp |
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827 / 1348 page ![]() Section 18 Serial Sound Interface (SSI) Rev. 2.00 Sep. 07, 2007 Page 795 of 1312 REJ09B0320-0200 Figure 18.10 uses a system word length of 6 bits and a data word length of 4 bits. These settings are not possible with the SSI module but are used only for clarification of the other configuration bits. 1. Inverted Clock SSISCK SSIWS SSIDATA 0 0 0 0 0 0 1st Channel 2nd Channel TD28 TD31 TD31 TD30 TD29 TD28 TD31 TD30 TD29 TD28 As basic sample format configuration except SCKP = 1 Figure 18.11 Inverted Clock 2. Inverted Word Select SSISCK SSIWS SSIDATA 0 0 0 0 0 0 1st Channel 2nd Channel TD28 TD31 TD31 TD30 TD29 TD28 TD31 TD30 TD29 TD28 As basic sample format configuration except SWSP = 1 Figure 18.12 Inverted Word Select 3. Inverted Padding Polarity SSISCK SSIWS SSIDATA TD28 TD31 1st Channel 2nd Channel 11 11 11 TD31 TD30 TD29 TD28 TD31 TD30 TD29 TD28 As basic sample format configuration except SPDP = 1 Figure 18.13 Inverted Padding Polarity |
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