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SH7261 Datasheet(PDF) 934 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 934 Page - Renesas Technology Corp

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Section 20 IEBus
TM Controller (IEB) [R5S72612] [R5S72613]
Rev. 2.00 Sep. 07, 2007 Page 902 of 1312
REJ09B0320-0200
Bit
Bit Name
Initial
Value
R/W
Description
0
STE
0
R/W
Slave Transmission Setting
Sets bit 4 in the slave status register. Transmitting the
slave status register informs the master unit that the
slave transmission enabled state is entered by setting
this bit to 1. Note that this bit only sets the slave status
register value and does not directly affect slave
transmission.
0: Bit 4 in the slave status register is 0 (slave
transmission stop state)
1: Bit 4 in the slave status register is 1 (slave
transmission enabled state)
20.3.5
IEBus Master Unit Address Register 2 (IEAR2)
IEAR2 sets the upper eight bits of the master unit address. In master communications, this register
becomes the master address field value. In slave communications, this register is compared with
the received slave address field.
IEAR2 is initialized by a power-on reset or in deep standby.
76543210
Bit:
Initial value:
R/W:
00000000
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IARU8
Bit
Bit Name
Initial
Value
R/W
Description
7 to 0
IARU8
All 0
R/W
Upper 8 Bits of IEBus Master Unit Address
Set the upper 8 bits of the master unit address. This
register becomes the master address field value. In
slave communications, the master unit address is
compared with the received slave address field



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