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SH7261 Datasheet(PDF) 1034 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 1034 Page - Renesas Technology Corp

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Section 21 CD-ROM Decoder (ROM-DEC)
Rev. 2.00 Sep. 07, 2007 Page 1002 of 1312
REJ09B0320-0200
21.4.5
Buffering Format
Figure 21.15 shows the format of the output data stream produced by CD-ROM decoding.
A 2-byte-wide window register is provided for the output. When this window register is accessed
after decoding of a CD-ROM sector has finished, the bytes of data are output in order from the
sync code.
Sync code
Header
Subheader
Data
EDC
ECC
Erasure
Reserved
H'00
Block error
H'0000
H'0000
Status (see below)
H'0000
Reserved
Storage flag
12 bytes
4 bytes
8 bytes
2048 bytes
4 bytes
276 bytes
294 bytes
108 bytes
2 bytes
2 bytes
2 bytes
2 bytes
2 bytes
2 bytes
2 bytes
Figure 21.15 Output Data Stream Format



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