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SH7261 Datasheet(PDF) 1035 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 1035 Page - Renesas Technology Corp

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Section 21 CD-ROM Decoder (ROM-DEC)
Rev. 2.00 Sep. 07, 2007 Page 1003 of 1312
REJ09B0320-0200
The meanings of bits in the two-byte status field shown in figure 21.15 are given below. The
values of the non-assigned bits are undefined.
Status
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PERR QERR EDCE
—
—
—
—
—
SD
SY
FM[2:0]
HD
—
—
PERR: Indicates that a P-parity error remains.
QERR: Indicates that a Q-parity error remains.
EDCE: Indicates that a remaining error was detected in post-correction EDC checking.
SD:
Indicates that a short sector was encountered
SY:
Indicates that a sync code was interpolated.
FM:
Indicates the data format
001: Mode 0
010: Mode 1
011: Long (format with no EDC and ECC)
100: Mode 2 (non-XA)
101: Mode 2 Form 1
111: Mode 2 Form 2
HD:
Header continuity (minutes, seconds, and frames (1/75) are non-sequential)
The value of the storage flag field in figure 21.15 is incremented every time the data for one sector
are output. The value starts at H'0000 and wraps back around to H'0000 after incrementation
reaches H'FFFF.



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