SH7261 datasheet(1037/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

1037 / 1348 page

Section 21 CD-ROM Decoder (ROM-DEC)

Rev. 2.00 Sep. 07, 2007 Page 1005 of 1312

REJ09B0320-0200

(2)

Setting Up Manual Buffering

Figure 21.17 shows an example of setting up manual buffering. Each time an ISEC interrupt is

generated, the software checks whether or not the sector is the target sector and starts buffering

when the target sector is found .

Start of automatic buffering setup

End of automatic buffering setup

Clear both the CBUF_AUT and

CBUF_EN bits in CBUFCTL0 to 0

Set the CBUF_EN bit

in CBUFCTL0 to 1

Generation of an ISEC interrupt

Read HEAD02, etc.

Target sector?

[1] Turn off the automatic buffering function

and disable buffering in the buffer RAM.

[2] Enable subcode processing and CD-ROM decoding.

[3] Start input of the data stream.

[1]

Set both the CBUF_AUT and

CBUF_EN bits in CBUFCTL0 to 1

[2]

[3]

Yes

Figure 21.17 Example of Setting Up Manual Buffering

SH7261 Datasheet(PDF) 1037 Page - Renesas Technology Corp