SH7261 datasheet(1039/1348 Pages) RENESAS

1039 / 1348 page

Section 21 CD-ROM Decoder (ROM-DEC)

Rev. 2.00 Sep. 07, 2007 Page 1007 of 1312

REJ09B0320-0200

(3)

ISY

This interrupt can be generated in the following cases.

• When a sync code was detected at a position where the value in the word counter (counter for

checking sync code intervals) was not correct and the sync code was ignored

• When a sync code has not been detected although the word counter has reached the final value

and a sync code has been interpolated (for sync maintenance)

• When a sync code was detected at a position where the value in the word counter (counter for

checking sync code intervals) was not correct and the sync code was used in resynchronization

• When a sync code has not been detected although the word counter has reached the final value,

so the period taken up by the sector has been prolonged

• When the sector has been processed as a short sector with the aid of interpolated sync codes

• When the sector has been processed as a long sector with the aid of interpolated sync codes

(4)

IERR

This interrupt is generated in the following cases.

• When ECC correction was incapable of correcting an error

• When ECC correction was OK but the subsequent EDC check indicated an error

(5)

IBUF

This interrupt is generated when the following transitions occur.

• Data transfer to the buffer → Data transfer complete (searching for data for the next transfer)

• Data for transfer to the buffer are being searched for → Data transfer started

(6)

IREADY

This interrupt is generated when decoding of data for one sector is completed. This interrupt

should be used to start the CPU buffering stream data for output to SDRAM.

(7)

DMA Transfer Request

The source of DMA activation is the same as that of IREADY. An interrupt request is generated

when output stream data for one sector becomes ready, and after the 2768 bytes of data shown in

figure 21.15 have been transferred, the request signal is negated once. This is because a certain

amount of time is required before the output data for the next sector is ready, so the transfer

request from the DMAC should be turned off between transfers.

SH7261 Datasheet(PDF) 1039 Page - Renesas Technology Corp