SH7261 datasheet(1053/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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1053 / 1348 page

Section 22 A/D Converter (ADC)

Rev. 2.00 Sep. 07, 2007 Page 1021 of 1312

REJ09B0320-0200

Typical operations when a single channel (AN1) is selected in single mode are described next.

Figure 22.2 shows a timing diagram for this example (the bits which are set in this example belong

to ADCSR).

1. Single mode is selected, input channel AN1 is selected (CH2 = 0, CH1 = 0, CH0 = 1), the A/D

interrupt is enabled (ADIE = 1), and A/D conversion is started (ADST = 1).

2. When A/D conversion is completed, the A/D conversion result is transferred into ADDRB. At

the same time the ADF flag is set to 1, the ADST bit is cleared to 0, and the A/D converter

becomes idle.

3. Since ADF = 1 and ADIE = 1, an ADI interrupt is requested.

4. The A/D interrupt handling routine starts.

5. The routine reads ADF = 1, and then writes 0 to the ADF flag.

6. The routine reads and processes the A/D conversion result (ADDRB).

7. Execution of the A/D interrupts handling routine ends. Then, when the ADST bit is set to 1,

A/D conversion starts and steps 2. to 7. are executed.

SH7261 Datasheet(PDF) 1053 Page - Renesas Technology Corp