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SH7261 Datasheet(PDF) 1049 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1049 Page - Renesas Technology Corp |
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1049 / 1348 page ![]() Section 22 A/D Converter (ADC) Rev. 2.00 Sep. 07, 2007 Page 1017 of 1312 REJ09B0320-0200 Bit Bit Name Initial Value R/W Description 13 ADST 0 R/W A/D Start Starts or stops A/D conversion. This bit remains set to 1 during A/D conversion. 0: A/D conversion is stopped 1: Single mode: A/D conversion starts. This bit is automatically cleared to 0 when A/D conversion ends on the selected channel. Multi mode: A/D conversion starts. This bit is automatically cleared to 0 when A/D conversion is completed cycling through the selected channels. Scan mode: A/D conversion starts. A/D conversion is continuously performed until this bit is cleared to 0 by software, by a power-on reset as well as by a transition to deep standby mode, software standby mode or module standby mode. 12 0 R Reserved This bit is always read as 0. The write value should always be 0. |
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