SH7261 datasheet(1046/1348 Pages) RENESAS

1046 / 1348 page

Section 22 A/D Converter (ADC)

Rev. 2.00 Sep. 07, 2007 Page 1014 of 1312

REJ09B0320-0200

22.3

The A/D converter has the following registers.

Table 22.2

Abbreviation

R/W

Initial

Value

Address

Access

Size

A/D data register A

ADDRA

H'0000

H'FFFE5800

A/D data register B

ADDRB

H'0000

H'FFFE5802

A/D data register C

ADDRC

H'0000

H'FFFE5804

A/D data register D

ADDRD

H'0000

H'FFFE5806

A/D data register E

ADDRE

H'0000

H'FFFE5808

A/D data register F

ADDRF

H'0000

H'FFFE580A

A/D data register G

ADDRG

H'0000

H'FFFE580C

A/D data register H

ADDRH

H'0000

H'FFFE580E

A/D control/status register

ADCSR

R/W

H'0040

H'FFFE5820

22.3.1

A/D Data Registers A to H (ADDRA to ADDRH)

The sixteen A/D data registers, ADDRA to ADDRH, are 16-bit read-only registers that store the

results of A/D conversion.

An A/D conversion produces 10-bit data, which is transferred for storage into the ADDR

corresponding to the selected channel. The 10 bits of the result are stored in the upper bits (bits 15

to 6) of ADDR. Bits 5 to 0 of ADDR are reserved bits that are always read as 0.

Access to ADDR in 8-bit units is prohibited. ADDR must always be accessed in 16-bit units.

ADDR is initialized to H'0000 by a power-on reset as well as in deep standby mode, software

standby mode or module standby mode.

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