 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SH7261 Datasheet(PDF) 1044 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7261 Datasheet(HTML) 1044 Page - Renesas Technology Corp |
|
|
1044 / 1348 page  Section 22 A/D Converter (ADC) Rev. 2.00 Sep. 07, 2007 Page 1012 of 1312 REJ09B0320-0200 Figure 22.1 shows a block diagram of the A/D converter. AN4 AN5 AN6 AN7 AN0 AN1 AN2 AN3 AVref Module data bus + – ADI interrupt signal ADTRG, conversion start trigger from MTU2 or TMR AVss AVcc Control circuit Comparator Sample-and-hold circuit 10-bit D/A Peripheral bus ADCSR: ADDRA: ADDRB: ADDRC: ADDRD: [Legend] A/D control/status register A/D data register A A/D data register B A/D data register C A/D data register D ADDRE: ADDRF: ADDRG: ADDRH: A/D data register E A/D data register F A/D data register G A/D data register H Figure 22.1 Block Diagram of A/D Converter |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
