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SH7261 Datasheet(PDF) 132 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 132 Page - Renesas Technology Corp

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Section 5 Exception Handling
Rev. 2.00 Sep. 07, 2007 Page 100 of 1312
REJ09B0320-0200
Exception Sources
Vector
Numbers
Vector Table Address Offset
(Reserved by system)
19
:
31
H'0000004C to H'0000004F
:
H'0000007C to H'0000007F
Trap instruction (user vector)
32
:
63
H'00000080 to H'00000083
:
H'000000FC to H'000000FF
External interrupts (IRQ, PINT), on-chip
peripheral module interrupts*
64
:
255
H'00000100 to H'00000103
:
H'000003FC to H'000003FF
Note:
*
The vector numbers and vector table address offsets for each external interrupt and on-
chip peripheral module interrupt are given in table 6.4 in section 6, Interrupt Controller
(INTC).
Table 5.4
Calculating Exception Handling Vector Table Addresses
Exception Source
Vector Table Address Calculation
Resets
Vector table address = (vector table address offset)
= (vector number)
× 4
Address errors, bus errors,
register bank errors, interrupts,
instructions
Vector table address = VBR + (vector table address offset)
= VBR + (vector number)
× 4
Notes: 1. Vector table address offset: See table 5.3.
2. Vector number: See table 5.3.



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