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SH7261 Datasheet(PDF) 147 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 147 Page - Renesas Technology Corp |
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147 / 1348 page ![]() Section 5 Exception Handling Rev. 2.00 Sep. 07, 2007 Page 115 of 1312 REJ09B0320-0200 5.9 Stack Status after Exception Handling Ends The status of the stack after exception handling ends is as shown in table 5.12. Table 5.12 Stack Status After Exception Handling Ends Exception Type Stack Status Address error 32 bits 32 bits SR Address of instruction after executed instruction SP Interrupt 32 bits 32 bits SR Address of instruction after executed instruction SP Bus error 32 bits 32 bits SR Address of instruction after executed instruction SP FPU exception 32 bits 32 bits SR Address of instruction after executed instruction SP Register bank error (overflow) 32 bits 32 bits SR Address of instruction after executed instruction SP |
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