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SH7261 Datasheet(PDF) 156 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 156 Page - Renesas Technology Corp |
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156 / 1348 page  Section 6 Interrupt Controller (INTC) Rev. 2.00 Sep. 07, 2007 Page 124 of 1312 REJ09B0320-0200 Register Name Bits 15 to 12 Bits 11 to 8 Bits 7 to 4 Bits 3 to 0 Interrupt priority register 13 SCIF6 SCIF7 DMINTA DMAC4 Interrupt priority register 14 DMAC5 DMAC6 DMAC7 Reserved Interrupt priority register 15 Reserved RCAN-ET0 RCAN-ET1 IEB Interrupt priority register 16 SSI0 SSI1 TMR0 TMR1 As shown in table 6.3, by setting the 4-bit groups (bits 15 to 12, bits 11 to 8, bits 7 to 4, and bits 3 to 0) with values from H'0 (0000) to H'F (1111), the priority of each corresponding interrupt is set. Setting of H'0 means priority level 0 (the lowest level) and H'F means priority level 15 (the highest level). IPR01, IPR02, and IPR05 to IPR16 are initialized to H'0000 by a power-on reset or in deep standby mode. |
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