Electronic Components Datasheet Search
  English  ▼

X  

SH7261 Datasheet(PDF) 158 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 158 Page - Renesas Technology Corp

Back Button SH7261 Datasheet HTML 154Page - Renesas Technology Corp SH7261 Datasheet HTML 155Page - Renesas Technology Corp SH7261 Datasheet HTML 156Page - Renesas Technology Corp SH7261 Datasheet HTML 157Page - Renesas Technology Corp SH7261 Datasheet HTML 158Page - Renesas Technology Corp SH7261 Datasheet HTML 159Page - Renesas Technology Corp SH7261 Datasheet HTML 160Page - Renesas Technology Corp SH7261 Datasheet HTML 161Page - Renesas Technology Corp SH7261 Datasheet HTML 162Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 158 / 1348 page
background image
Section 6 Interrupt Controller (INTC)
Rev. 2.00 Sep. 07, 2007 Page 126 of 1312
REJ09B0320-0200
6.3.3
Interrupt Control Register 1 (ICR1)
ICR1 is a 16-bit register that specifies the detection mode for external interrupt input pins IRQ7 to
IRQ0 individually: low level, falling edge, rising edge, or both edges. ICR1 is initialized by a
power-on reset or in deep standby mode.
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9876543210
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
IRQ7
1S
IRQ7
0S
IRQ6
1S
IRQ6
0S
IRQ5
1S
IRQ5
0S
IRQ4
1S
IRQ4
0S
IRQ3
1S
IRQ3
0S
IRQ2
1S
IRQ2
0S
IRQ1
1S
IRQ1
0S
IRQ0
1S
IRQ0
0S
Bit
Bit Name
Initial
Value
R/W
Description
15
IRQ71S
0
R/W
14
IRQ70S
0
R/W
13
IRQ61S
0
R/W
12
IRQ60S
0
R/W
11
IRQ51S
0
R/W
10
IRQ50S
0
R/W
9
IRQ41S
0
R/W
8
IRQ40S
0
R/W
7
IRQ31S
0
R/W
6
IRQ30S
0
R/W
5
IRQ21S
0
R/W
4
IRQ20S
0
R/W
3
IRQ11S
0
R/W
2
IRQ10S
0
R/W
1
IRQ01S
0
R/W
0
IRQ00S
0
R/W
IRQ Sense Select
These bits select whether interrupt signals
corresponding to pins IRQ7 to IRQ0 are detected by a
low level, falling edge, rising edge, or both edges.
00: Interrupt request is detected on low level of IRQn
input
01: Interrupt request is detected on falling edge of IRQn
input
10: Interrupt request is detected on rising edge of IRQn
input
11: Interrupt request is detected on both edges of IRQn
input
[Legend]
n = 7 to 0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com