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SH7261 Datasheet(PDF) 236 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 236 Page - Renesas Technology Corp |
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236 / 1348 page ![]() Section 8 Cache Rev. 2.00 Sep. 07, 2007 Page 204 of 1312 REJ09B0320-0200 8.4.4 Notes 1. Programs that access memory-mapped cache should be placed in an address space that is not cached. 2. Rewriting the address array contents so that two or more ways are hit simultaneously is prohibited. Operation is not guaranteed if the address array contents are changed so that two or more ways are hit simultaneously. 3. Memory-mapped cache can be accessed only by the CPU and not by the DMAC. Registers can be accessed by the CPU and the DMAC. |
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