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38K2 Datasheet(PDF) 40 Page - Renesas Technology Corp |
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38K2 Datasheet(HTML) 40 Page - Renesas Technology Corp |
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40 / 358 page ![]() FUNCTIONAL DESCRIPTION Rev.2.00 Oct 15, 2006 page 21 of 130 38K2 Group REJ09B0338-0200 HARDWARE Fig. 17 Timer block diagram Q Q “1” “0” P51/CNTR0 1/16 “0” “1” R T System clock 1/16 Prescaler X latch (8) Prescaler X (8) Timer X latch (8) Timer X (8) Timer X interrupt request bit Toggle flip-flop Timer X count stop bit Pulse width measurement mode Event counter mode CNTR0 interrupt request bit Pulse output mode Port P51 latch Port P51 direction register CNTR0 active edge selection bit Timer X latch write Pulse output mode Timer mode Pulse output mode Data bus Divider Prescaler 12 latch (8) Prescaler 12 (8) Timer 1 latch (8) Timer 1 (8) Timer 2 latch (8) Timer 2 (8) Timer 2 interrupt request bit Timer 1 interrupt request bit CNTR0 active edge selection bit Data bus System clock Divider |
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