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38K2 Datasheet(PDF) 100 Page - Renesas Technology Corp |
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38K2 Datasheet(HTML) 100 Page - Renesas Technology Corp |
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100 / 358 page ![]() FUNCTIONAL DESCRIPTION Rev.2.00 Oct 15, 2006 page 81 of 130 38K2 Group REJ09B0338-0200 HARDWARE Fig. 119 Index03[high]; Structure of Memory address counter Fig. 120 Index04[low]; Structure of End address register Fig. 121 Index04[high]; Structure of End address register b7 b0 IM_A [10:8] b7:b3 – – 0 – Index = 0316 : Memory address counter (MEMADH) [address 003516] 00000 Bit name Bit symbol At reset Function H/W S/W O O O O –: State remaining – Not used Register to set the high-order address of memory channel operation start. This contents are increased each time one memory access ends. Write “0” when writing. “0” is read when reading. W R b7 b0 END_A [7:0] – 0 Index = 0416 : End address register (ENDADL) [address 003416] Bit name Bit symbol At reset Function H/W S/W OO –: State remaining – Register to set the low-order address of memory channel operation end. W R b7 b0 END_A [10:8] b7:b3 – – 0 – Index = 0416 : End address register (ENDADH) [address 003516] 00000 Bit name Bit symbol At reset Function H/W S/W O O O O –: State remaining – Not used Register to set the high-order address of memory channel operation end. Write “0” when writing. “0” is read when reading. W R |
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