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38K2 Datasheet(PDF) 160 Page - Renesas Technology Corp |
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38K2 Datasheet(HTML) 160 Page - Renesas Technology Corp |
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160 / 358 page  2.2 Interrupt Rev.2.00 Oct 15, 2006 page 11 of 112 38K2 Group REJ09B0338-0200 APPLICATION 2.2.3 Interrupt source The 38K2 group permits interrupts of 16 sources. These are vector interrupts with a fixed priority system. Accordingly, when two or more interrupt requests occur during the same sampling, the higher-priority interrupt is accepted first. This priority is determined by hardware, but a variety of priority processing can be performed by software, using an interrupt enable bit and an interrupt disable flag. For interrupt sources, vector addresses and interrupt priority, refer to Table 2.2.1. Table 2.2.1 Interrupt sources, vector addresses and priority of 38K2 group Remarks Low FFFC16 FFFA16 FFF816 FFF616 FFF416 FFF216 FFF016 FFEE16 FFEC16 FFEA16 FFE816 FFE616 FFE416 FFE216 FFE016 FFDE16 FFDC16 High FFFD16 FFFB16 FFF916 FFF716 FFF516 FFF316 FFF116 FFEF16 FFED16 FFEB16 FFE916 FFE716 FFE516 FFE316 FFE116 FFDF16 FFDD16 Notes 1: Vector addresses contain interrupt jump destination addresses. 2: Reset function in the same way as an interrupt with the highest priority. Vector Addresses (Note 1) Non-maskable Valid when USB is selected Valid when USB is selected Valid when USB is selected Valid when external bus is selected External interrupt (active edge selectable) STP release timer underflow External interrupt (active edge selectable) Valid when USB HUB is selected Valid when serial I/O is selected Valid when serial I/O is selected External interrupt (active edge selectable) External interrupt (active edge selectable) Non-maskable software interrupt Interrupt Source Reset (Note 2) USB bus reset USB SOF USB device External bus INT0 Timer X Timer 1 Timer 2 INT1 USB HUB Serial I/O reception Serial I/O transmission CNTR0 Key-on wake up A/D conversion BRK instruction Priority 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Interrupt Request Generating Conditions At reset At detection of USB bus reset signal (2.5 µs interval SE0) At detection of USB SOF signal At detection of resume signal (K state or SE0) or suspend signal (3 ms interval bus idle), or at completion of transaction At completion of reception or transmission or at completion of DMA transmission At detection of either rising or falling edge of INT0 input At timer X underflow At timer 1 underflow At timer 2 underflow At detection of either rising or falling edge of INT1 input At detection of status change of USB HUB down ports At completion of serial I/O data reception At completion of serial I/O data transmission At detection of either rising or falling edge of CNTR0 input At falling of conjunction of input level for port P0 (at input mode) At completion of A/D conversion At BRK instruction execution |
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