HD64F2649 datasheet(49/766 Pages) RENESAS

49 / 766 page

Section 1 Overview

Rev. 2.00 Dec. 05, 2005 Page 11 of 724

REJ09B0200-0200

Type

Symbol

Pin No.

I/O

Name and Function

Clock

PLLVss

Input

Ground pin for on-chip PLL oscillator

PLLCAP

Input

External capacitance pin for on-chip PLL

oscillator

XTAL

Input

EXTAL

Input

Connects to a crystal oscillator.

See section 20, Clock Pulse Generator,

for typical connection diagrams for a

crystal oscillator.

The EXTAL pin can also input an

external clock.

OSC1

Input

OSC2

Input

Connects to a 32.768-MHz crystal

oscillator. See section 20, Clock Pulse

Generator, for typical connection

diagrams for a crystal oscillator.

100

Output

Supplies the system clock to an external

device.

Operating mode

control

MD2 to

MD0

72 to 74

Input

These pins set the operating mode.

These pins should not be changed while

this LSI is operating.

System control

RES

Input

Reset pin

When this pin is driven low, the chip is

reset.

STBY

Input

When this pin is driven low, a transition

is made to hardware standby mode.

FWE

Input

Pin for flash memory

Interrupts

NMI

Input

Requests a nonmaskable interrupt.

When this pin is not used, it should be

fixed high.

IRQ5 to

IRQ0

80, 77, 99,

98, 107,

105

Input

These pins request a maskable

interrupt.

Address bus

A23 to A0

46 to 43,

50 to 47,

37 to 22

Output

These pins output an address.

Data bus

D15 to D0

20 to 13,

11 to 4

I/O

These pins constitute a bidirectional

data bus.

HD64F2649 Datasheet(PDF) 49 Page - Renesas Technology Corp

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