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SH7014 Datasheet(PDF) 634 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 634 Page - Renesas Technology Corp |
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634 / 754 page ![]() Appendix A On-Chip Supporting Module Registers Rev.5.00 Sep. 27, 2007 Page 600 of 716 REJ09B0398-0500 A.2 Functions Item Bit Nmae Initial value R/W 7 C/ A 0 R/W 6 CHR 0 R/W 5 PE 0 R/W 4 O/ E 0 R/W 3 STOP 0 R/W 2 MP 0 R/W 1 CKS1 0 R/W 0 CKS0 0 R/W Bit Bit 7 6 5 4 3 2 1, 0 Value 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Name Communication Mode (C/ A) Character Length (CHR) Parity Enable (PE) Parity Mode (O/ E) Stop Bit Length (STOP) Multiprocessor Mode (MP) Clock Select 1 and 0 (CKS1 and CKS0) Description Asynchronous mode Clock synchronous mode 8-bit data (Initial value) 7-bit data (Initial value) Parity bit not added or checked (Initial value) Parity bit added and checked Even parity (Initial value) Odd parity 1 stop bit (Initial value) 2 stop bits Multiprocessor function disabled (Initial value) Multiprocessor format selected φ/4 (Initial value) φ/16 φ/64 φ/256 Descriptions of bit settings Initial bit values (When two or more bits are described as a set, the higher bits are on the left and the lower bits on the right.) Bit acronym Bit numbers Register outline Bit functions H'FFFF81A0 (Channel 0) H'FFFF81B0 (Channel 1) 8/16 Serial Mode Register (SMR) Start address Module Access size SCI Register acronym |
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