SH7014 datasheet(66/754 Pages) RENESAS

66 / 754 page

2. CPU

Rev.5.00 Sep. 27, 2007 Page 32 of 716

REJ09B0398-0500

Instruction Formats

Source

Operand

Destination

Operand

Example

d format

dddd

xxxx

dddd

dddddddd:

Indirect GBR

with

displacement

R0 (Direct register)

MOV.L

@(disp,GBR),R0

R0 (Direct

dddddddd: Indirect

GBR with

displacement

MOV.L

R0,@(disp,GBR)

dddddddd: PC

relative with

displacement

R0 (Direct register)

MOVA

@(disp,PC),R0

dddddddd: PC

relative

⎯

label

d12 format

dddd

xxxx

dddd

dddddddddddd:

PC relative

⎯

BRA

label

(label = disp

+ PC)

nd8 format

dddd

nnnn

xxxx

dddd

dddddddd: PC

relative with

displacement

nnnn: Direct

MOV.L

@(disp,PC),Rn

iiiiiiii: Immediate

Indirect indexed

GBR

AND.B

#imm,@(R0,GBR)

i format

xxxx

i i i i

iiiiiiii: Immediate

R0 (Direct register)

AND

#imm,R0

iiiiiiii: Immediate

⎯

TRAPA

#imm

ni format

nnnn

i i i i

xxxx

i i i i

iiiiiiii: Immediate

nnnn: Direct

ADD

#imm,Rn

Note:

In multiply/accumulate instructions, nnnn is the source register.

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