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SH7014 Datasheet(PDF) 733 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 733 Page - Renesas Technology Corp |
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733 / 754 page ![]() Appendix B I/O Port Block Diagrams Rev.5.00 Sep. 27, 2007 Page 699 of 716 REJ09B0398-0500 PDR Programmer mode RES Single-chip mode MCU mode 0 MCU mode 1 MCU mode 2 Dn Dout PFC SBYCR Din Standby SLEEP PDW PDnDR Q C D R On-chip flash memory* Dn Q PDnMD0 Q PDnIOR Q HIZ Notes: Legend: PDR: PDW: RES: Dout: Din: Port D read signal Port D write signal Reset signal Data bus output timing signal Data bus input timing signal n = 0 to 15 * F-ZTAT version only Figure B.18 PDn/Dn Block Diagram (SH7016, SH7017) |
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