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7641 Datasheet(PDF) 300 Page - Renesas Technology Corp |
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7641 Datasheet(HTML) 300 Page - Renesas Technology Corp |
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300 / 385 page  Rev.2.00 Aug 28, 2006 page 21 of 108 7641 Group REJ09B0336-0200 APPENDIX 3.1 Electrical characteristics Fig. 3.1.8 Timing diagram (6); Memory expansion and microprocessor modes tWL( φ) 0.5VCC tWH( φ) tC( φ) td( φ-AH) td( φ-AL) td( φ-SYNC) tv( φ-AH) tv( φ-AL) tv( φ-SYNC) td( φ-WR) td( φ-RD) tv( φ-WR) tv( φ-RD) 0.5VCC 0.5VCC 0.5VCC AB15 to AB8 AB7 to AB0 SYNCOUT RD,WR DMAOUT 0.8VCC 0.2VCC th( φ-DB) 0.5VCC td( φ-DB) tv( φ-DB) DB0 to DB7 DB0 to DB7 0.5VCC tv( φ-DMA) 0.5VCC td( φ-DMA) RDY 0.8VCC 0.2VCC tsu(RDY- φ) th( φ-RDY) HOLD (at entering) 0.8VCC 0.2VCC tsu(HOLD- φ) th(φ-HOLD) HLDA td( φ-HLDAL) HOLD (at releasing) 0.8VCC 0.2VCC tsu(HOLD- φ) th(φ-HOLD) HLDA td( φ-HLDAH) 0.5VCC 0.5VCC tsu(DB- φ) <CPU write> EDMA 0.5VCC tv( φ-EDMA) 0.5VCC td( φ-EDMA) <CPU read> φ n cycles of φ |
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