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SH7018 Datasheet(PDF) 352 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 352 Page - Renesas Technology Corp |
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352 / 431 page ![]() 336 16.7 Programming/Erasing Flash Memory A software method, using the CPU, is employed to program and erase flash memory in the on- board programming modes. There are four flash memory operating modes: program mode, erase mode, program-verify mode, and erase-verify mode. Transitions to these modes can be made by setting the PSU, ESU, P, E, PV, and EV bits in FLMCR1. The flash memory cannot be read while being programmed or erased. Therefore, the program (programming control program) that controls flash memory programming/erasing should be located and executed in on-chip RAM or external memory. Notes: 1. Operation is not guaranteed if setting/resetting of the SWE, ESU, PSU, EV, PV, E, and P bits in FLMCR1 is executed by a program in flash memory. 2. When programming or erasing, a low level is input to the FWP pin (programming/erasing will not be executed if a high level is input to the FWP pin). 3. Programming should be performed in the erased state. Do not perform additional programming on previously programmed addresses. 16.7.1 Program Mode Follow the procedure shown in the program/program-verify flowchart in figure 16.12 to write data or programs to flash memory. Performing program operations according to this flowchart will enable data or programs to be written to flash memory without subjecting the device to voltage stress or sacrificing program data reliability. Programming should be carried out 128 bytes at a time. Following the elapse of 1 µs or more after the SWE bit is set to 1 in flash memory control register 1 (FLMCR1), 128-byte program data is stored in the program address (the lower 8 bits of the first address written to must be H'00, or H'80). The program address and program data are latched in the flash memory. A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this case, H'FF data must be written to the extra addresses. Next, the watchdog timer is set to prevent overprogramming in the event of program runaway, etc. After this, preparation for program mode (program setup) is carried out by setting the PSU bit in FLMCR1, and after the elapse of 50 µs or more, the operating mode is switched to program mode by setting the P bit in FLMCR1. The time during which the P bit is set is the flash memory programming time. For the write time, refer to the table accompanying the Program/Program- Verify Flowchart. |
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