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SH7018 Datasheet(PDF) 192 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 192 Page - Renesas Technology Corp |
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192 / 431 page ![]() 176 9.4.3 Timing of Compare Match Flag Clearing The CMF bit in the T2CSR register is cleared by reading the bit when it is set to 1, then writing 0 in it. Figure 9.5 shows the timing of CMF bit clearing by the CPU. T1 T2 T2CSR write cycle CK CMF Figure 9.5 Timing of CMF Clearing by CPU |
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