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SH7018 Datasheet(PDF) 268 Page - Renesas Technology Corp

Part # SH7018
Description  SuperH??RISC engine
PDF  431 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7018 Datasheet(HTML) 268 Page - Renesas Technology Corp

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Error handling
End
Clear ORER bit of SSR1 to 0
Overrun error processing
Figure 12.18 Sample Flowchart for Serial Receiving (cont)
Figure 12.19 shows an example of the SCI1 receive operation.
Bit 7
Bit 0
Bit 7
Bit 0
Bit 1
Bit 6
Synchroni-
zation clock
Serial
data
Transfer direction
Bit 7
Read data with RxI
interrupt processing
routine and clear
RDRF bit to 0
1 frame
RxI request
RxI request
ERI interrupt
request generated
by overrun error
RDRF
ORER
Figure 12.19 Example of SCI1 Receive Operation
In receiving, the SCI1 operates as follows:
1. The SCI1 synchronizes with serial clock input or output and initializes internally.
2. Receive data is shifted into the RSR1 in order from the LSB to the MSB. After receiving the
data, the SCI1 checks that RDRF is 0 so that receive data can be loaded from the RSR1 into
the RDR1. If this check passes, the SCI1 sets RDRF to 1 and stores the received data in the
RDR1. If the check does not pass (receive error), the SCI1 operates as indicated in table 12.11
and no further transmission or reception is possible. If the error flag is set to 1, the RDRF bit is



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