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SH7018 Datasheet(PDF) 289 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 289 Page - Renesas Technology Corp |
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289 / 431 page ![]() 273 (1) (2) CK ADF Address Write signal Input sampling timing tD tSPL tCONV (1): (2): tD: tSPL: tCONV: ADCSR write cycle ADCSR address A/D conversion start delay time Input sampling time A/D conversion time Figure 13.5 A/D Conversion Timing Table 13.4 A/D Conversion Times (Single Mode) CKS = 0 CKS = 1 Symbol Min Typ Max Min Typ Max A/D conversion start delay time t D 10 — 17 6 — 9 Input sampling time t SPL — 64 —— 32 — A/D conversion time t CCNV 259 — 266 131 — 134 Note: Unit: states (t cyc ) |
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