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SH7018 Datasheet(PDF) 329 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 329 Page - Renesas Technology Corp |
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329 / 431 page ![]() 313 15.7.2 Port E Data Register (PFDR) The port F data register (PFDR) is an 8-bit read-only register that stores port F data. The bits of this register correspond to the various pins. Writes to these bits are ignored, and do not affect the pin states. When these bits are read the pin state, not the register value, is returned directly. However, 1 is returned while A/D converter analog input is being sampled. Table 15.12 summarizes the port E data register read/write operations. PFDR is not initialized by a power-on reset, in standby mode, or in sleep mode. (The bits always reflect the pin states.) Bit: 7 6 5 4 3 2 1 0 PF7DR PF6DR PF5DR PF4DR PF3DR PF2DR PF1DR PF0DR Initial value: ** ** *** * R/W: R R R R R R R R Note: * These values depend on the pin state when the initial value is read. Table 15.12 Port F Data Register (PFDR) Read/Write Operations Pin Function Pin state Read Write Input General input Pin state is read Ignored (does not affect pin state) ANn 1 is read Ignored (does not affect pin state) ANn: Analog input |
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