SH7018 datasheet(325/431 Pages) RENESAS

325 / 431 page

309

15.5.2

Port D Data Register L (PDDRL)

Port D data register L (PDDRL) is a 16-bit readable/writable register that stores port D data. The

bits of this register correspond to the various pins.

When a pin functions as a general output, if a value is written to PDDRL, that value is output

directly from the pin, and if PDDRL is read, the register value is returned directly regardless of the

pin state.

When a pin functions as a general input, if PDDRL is read the pin state, not the register value, is

returned directly. If a value is written to PDDRL, that value is written to PDDRL but it does not

affect the pin state. Table 15.8 summarizes the port D data register read/write operations.

PDDRL is initialized by an external power-on reset. However, it is not initialized by a WDT reset,

in standby mode, or in sleep mode.

Bit:

——

———

—

Initial value:

R/W:

Bit:

PD7DR

PD6DR

PD5DR

PD4DR

PD3DR

PD2DR

PD1DR

PD0DR

Initial value:

R/W:

R/W

Table 15.8

Port D Data Register (PDDR) Read/Write Operations

PDIOR

Pin Function

Read

Write

General input

Pin state

Value is written to PDDR, but does not affect pin

state

Other than general

input

Pin state

Value is written to PDDR, but does not affect pin

state

General output

PDDR value

Write value is output from pin

Other than general

output

PDDR value

Value is written to PDDR, but does not affect pin

state

SH7018 Datasheet(PDF) 325 Page - Renesas Technology Corp

SH7018 Datasheet(HTML) 325 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL