SH7018 datasheet(321/431 Pages) RENESAS

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15.3.2

Port B Data Register (PBDR)

The port B data register (PBDR) is a 16-bit readable/writable register that stores port B data. The

bits of this register correspond to the various pins.

When a pin functions as a general output, if a value is written to PBDR, that value is output

directly from the pin, and if PBDR is read, the register value is returned directly regardless of the

pin state.

When a pin functions as a general input, if PBDR is read the pin state, not the register value, is

returned directly. If a value is written to PBDR, that value is written to PBDR but it does not affect

the pin state. Table 15.4 summarizes the port B data register read/write operations.

PADR is initialized by an external power-on reset. However, it is not initialized by a WDT reset,

in standby mode, or in sleep mode.

Bit:

——

PB9DR

PB8DR

Initial value:

R/W:

R/W

Bit:

PB7DR

PB6DR

PB5DR

PB4DR

PB3DR

PB2DR

PB1DR

PB0DR

Initial value:

R/W:

R/W

Table 15.4

Port B Data Register (PBDR) Read/Write Operations

PBIOR

Pin Function

Read

Write

General input

Pin state

Value is written to PBDR, but does not affect pin

state

Other than general

input

Pin state

Value is written to PBDR, but does not affect pin

state

General output

PBDR value

Write value is output from pin

Other than general

output

PBDR value

Value is written to PBDR, but does not affect pin

state

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