SH7052 datasheet(336/919 Pages) RENESAS

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The ECNT counters are 8-bit readable/writable registers that count on detection of an input signal

from input pins TI9A to TI9F. Rising edge, falling edge, or both rising and falling edges can be

selected for edge detection.

Bit:

Initial value:

R/W:

R/W

When a compare-match with GR9 corresponding to an ECNT9x counter occurs, the compare-

match flag (CMF9) in the timer status register (TSR9) is set to 1. When a compare-match with GR

occurs, the ECNT9x counter is cleared automatically.

The ECNT9x counters can only be accessed by a byte read or write.

The ECNT9x counters are initialized to H'00 by a power-on reset, and in hardware standby mode

and software standby mode.

10.2.18

Output Compare Registers (OCR)

The output compare registers (OCR) are 16-bit registers. The ATU-II has nine OCR registers: one

in channel 1 and eight in channel 2.

Channel

Abbreviation

Function

OCR1

Output compare registers

OCR2A, OCR2B,

OCR2C, OCR2D,

OCR2E, OCR2F,

OCR2G, OCR2H

Output Compare Registers 1 and 2A to 2H (OCR1, OCR2A to OCR2H)

Bit:

Initial value:

R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W

The OCR registers are 16-bit readable/writable registers that have an output compare register

function.

The OCR and free-running counter (TCNT1B, TCNT2B) values are constantly compared, and if

the two values match, the CMF bit in the timer status register (TSR) is set to 1. If channels 1 and 2

SH7052 Datasheet(PDF) 336 Page - Renesas Technology Corp