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SH7052 Datasheet(PDF) 397 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 397 Page - Renesas Technology Corp |
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397 / 919 page ![]() 371 10.5.4 8-Bit or 16-Bit Accessible Registers The timer control registers (TCR1A, TCR1B, TCR2A, TCR2B, TCR6A, TCR6B, TCR7A, TCR7B), timer I/O control registers (TIOR1A to TIOR1D, TIOR2A to TIOR2D, TIOR3A, TIOR3B, TIOR4A, TIOR4B, TIOR5A, TIOR5B), and the timer start register (TSTR1, TSTR2, TSTR3) are 8-bit registers. These registers are connected to the upper 8 bits or lower 8 bits of the internal 16-bit data bus, and can be read or written a byte at a time. In addition, a pair of 8-bit registers for which only the least significant bit of the address is different, such as timer I/O control register 1A (TIOR1A) and timer I/O control register 1B (TIOR1B), can be read or written in combination a word at a time. Figures 10.49 and 10.50 show the operation when performing individual byte read or write accesses to TIOR1A and TIOR1B. Figure 10.51 shows the operation when performing a word read or write access to TIOR1A and TIOR1B simultaneously. CPU Internal data bus Only upper 8 bits used Only upper 8 bits used TIOR1B TIOR1A Module data bus Bus interface Figure 10.49 Byte Read/Write Access to TIOR1B CPU Internal data bus Only lower 8 bits used Only lower 8 bits used TIOR1B TIOR1A Module data bus Bus interface Figure 10.50 Byte Read/Write Access to TIOR1A CPU Internal data bus TIOR1B TIOR1A Module data bus Bus interface Figure 10.51 Word Read/Write Access to TIOR1A and TIOR1B |
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