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SH7052 Datasheet(PDF) 695 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 695 Page - Renesas Technology Corp |
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695 / 919 page ![]() 669 19.5.2 Port D Data Register (PDDR) Bit: 15 14 13 12 11 10 9 8 —— PD13 DR PD12 DR PD11 DR PD10 DR PD9 DR PD8 DR Initial value: 0 0 0 0 0 0 0 0 R/W: R R R/W R/W R/W R/W R/W R/W Bit: 7 6 5 4 3 2 1 0 PD7 DR PD6 DR PD5 DR PD4 DR PD3 DR PD2 DR PD1 DR PD0 DR Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W The port D data register (PDDR) is a 16-bit readable/writable register that stores port D data. Bits PD13DR to PD0DR correspond to pins PD13/PULS6/HTxD0/HTxD1 to PD0/TIO1A. When a pin functions as a general output, if a value is written to PDDR, that value is output directly from the pin, and if PDDR is read, the register value is returned directly regardless of the pin state. When a pin functions as a general input, if PDDR is read the pin state, not the register value, is returned directly. If a value is written to PDDR, although that value is written into PDDR it does not affect the pin state. Table 19.8 summarizes port D data register read/write operations. PDDR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), and in hardware standby mode. It is not initialized in software standby mode or sleep mode. • Bits 15 and 14— Reserved: These bits always read 0. The write value should always be 0. Table 19.8 Port D Data Register (PDDR) Read/Write Operations Bits 13 to 0: PDIOR Pin Function Read Write 0 General input Pin state Value is written to PDDR, but does not affect pin state Other than general input Pin state Value is written to PDDR, but does not affect pin state 1 General output PDDR value Write value is output from pin Other than general output PDDR value Value is written to PDDR, but does not affect pin state |
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