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SH7243 Datasheet(PDF) 455 Page - Renesas Technology Corp

Part # SH7243
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
PDF  1726 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7243 Datasheet(HTML) 455 Page - Renesas Technology Corp

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Section 10 Direct Memory Access Controller (DMAC)
Rev. 1.00 Jun. 26, 2008 Page 425 of 1692
REJ09B0393-0100
Table 10.10 Relationship of Request Modes and Bus Modes by DMA Transfer Category
Address
Mode
Transfer Category
Request
Mode
Bus
Mode
Transfer
Size (Bits)
Usable
Channels
External device with DACK and external memory
External
B/C
8/16/32/128
0 to 3
External device with DACK and memory-mapped
external device
External
B/C
8/16/32/128
0 to 3
External memory and external memory
All*
4
B/C
8/16/32/128
0 to 7*
3
External memory and memory-mapped external
device
All*
4
B/C
8/16/32/128
0 to 7*
3
Memory-mapped external device and memory-
mapped external device
All*
4
B/C
8/16/32/128
0 to 7*
3
External memory and on-chip peripheral module
All*
1
B/C*
5
8/16/32/128*
2
0 to 7*
3
Memory-mapped external device and
on-chip peripheral module
All*
1
B/C*
5
8/16/32/128*
2
0 to 7*
3
On-chip peripheral module and on-chip peripheral
module
All*
1
B/C*
5
8/16/32/128*
2
0 to 7*
3
On-chip memory and on-chip memory
All*
4
B/C
8/16/32/128
0 to 7*
3
On-chip memory and memory-mapped external
device
All*
4
B/C
8/16/32/128
0 to 7*
3
On-chip memory and on-chip peripheral module
All*
1
B/C*
5
8/16/32/128*
2
0 to 7*
3
Dual
On-chip memory and external memory
All*
4
B/C
8/16/32/128
0 to 7*
3
External device with DACK and external memory
External
B/C
8/16/32/128
0 to 3
Single
External device with DACK and memory-mapped
external device
External
B/C
8/16/32/128
0 to 3
[Legend]
B: Burst
C: Cycle steal
Notes: 1. External requests, auto requests, and on-chip peripheral module requests are all
available. However, along with the exception of CMT and MTU2 as the transfer request
source, the requesting module must be designated as the transfer source or the
transfer destination.
2. Access size permitted for the on-chip peripheral module register functioning as the
transfer source or transfer destination.
3. If the transfer request is an external request, channels 0 to 3 are only available.
4. External requests, auto requests, and on-chip peripheral module requests are all
available. In the case of on-chip peripheral module requests, however, the CMT and
MTU2 are only available.
5. Only cycle steal except for the MTU2 and CMT as the transfer request source.



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