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SH7243 Datasheet(PDF) 125 Page - Renesas Technology Corp |
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SH7243 Datasheet(HTML) 125 Page - Renesas Technology Corp |
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125 / 1726 page ![]() Section 5 Exception Handling Rev. 1.00 Jun. 26, 2008 Page 95 of 1692 REJ09B0393-0100 Section 5 Exception Handling 5.1 Overview 5.1.1 Types of Exception Handling and Priority Exception handling is started by sources, such as resets, address errors, register bank errors, interrupts, and instructions. Table 5.1 shows their priorities. When several exception handling sources occur at once, they are processed according to the priority shown. Table 5.1 Types of Exception Handling and Priority Order Type Exception Handling Priority Power-on reset Reset Manual reset CPU address error Address error DMAC address error Integer division exception (division by zero) Instruction Integer division exception (overflow) Bank underflow Register bank error Bank overflow NMI User break H-UDI IRQ A/D converter (ADC) Controller area network (RCAN-ET) Direct memory access controller (DMAC) Compare match timer (CMT) Bus state controller (BSC) Watchdog timer (WDT) USB function module (USB) DTC transfer end Interrupt On-chip peripheral modules Multi-function timer pulse unit 2 (MTU2) High Low |
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