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SH7243 Datasheet(PDF) 129 Page - Renesas Technology Corp

Part # SH7243
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
PDF  1726 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7243 Datasheet(HTML) 129 Page - Renesas Technology Corp

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Section 5 Exception Handling
Rev. 1.00 Jun. 26, 2008 Page 99 of 1692
REJ09B0393-0100
5.1.3
Exception Handling Vector Table
Before exception handling begins running, the exception handling vector table must be set in
memory. The exception handling vector table stores the start addresses of exception service
routines. (The reset exception handling table holds the initial values of PC and SP.)
All exception sources are given different vector numbers and vector table address offsets, from
which the vector table addresses are calculated. During exception handling, the start addresses of
the exception service routines are fetched from the exception handling vector table, which is
indicated by this vector table address.
Table 5.3 shows the vector numbers and vector table address offsets. Table 5.4 shows how vector
table addresses are calculated.
Table 5.3
Exception Handling Vector Table
Exception Sources
Vector
Numbers
Vector Table Address Offset
PC
0
H'00000000 to H'00000003
Power-on reset
SP
1
H'00000004 to H'00000007
PC
2
H'00000008 to H'0000000B
Manual reset
SP
3
H'0000000C to H'0000000F
General illegal instruction
4
H'00000010 to H'00000013
(Reserved by system)
5
H'00000014 to H'00000017
Slot illegal instruction
6
H'00000018 to H'0000001B
7
H'0000001C to H'0000001F
(Reserved by system)
8
H'00000020 to H'00000023
CPU address error
9
H'00000024 to H'00000027
DMAC address error
10
H'00000028 to H'0000002B
NMI
11
H'0000002C to H'0000002F
Interrupts
User break
12
H'00000030 to H'00000033
(Reserved by system)
13
H'00000034 to H'00000037
H-UDI
14
H'00000038 to H'0000003B
Bank overflow
15
H'0000003C to H'0000003F
Bank underflow
16
H'00000040 to H'00000043



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