SH7243 datasheet(241/1726 Pages) RENESAS

241 / 1726 page

Section 8 Data Transfer Controller (DTC)

Rev. 1.00 Jun. 26, 2008 Page 211 of 1692

REJ09B0393-0100

8.4

Location of Transfer Information and DTC Vector Table

Locate the transfer information in the data area. The start address of transfer information should be

located at the address that is a multiple of four (4n). Otherwise, the lower two bits are ignored

during access ([1:0] = B'00.) Transfer information located in the data area is shown in figure 8.2.

Short address mode can be selected by setting the DTSA bit in the bus function extending register

(BSCEHR) to 1 only when all DTC transfer sources and destinations are located in the on-chip

RAM and on-chip peripheral module areas (see section 9.4.8, Bus Function Extending Register

(BSCEHR)).

In normal transfer, four longwords should be read as the transfer information; in short address

mode, the transfer information is reduced to three longwords and the DTC active period becomes

shorter.

The DTC reads the start address of transfer information from the vector table according to the

activation source, and then reads the transfer information from the start address. Figure 8.3 shows

correspondences between the DTC vector address and transfer information.

MRA

MRB

MRA

MRB

SAR

DAR

CRA

CRB

CRA

CRB

SAR

DAR

MRA

MRB

MRA

MRB

SAR

DAR

CRA

CRB

CRA

CRB

SAR

DAR

Lower addresses

Transfer information

in short address mode

The short address mode can be used only for transfer between an on-chip

peripheral module and the on-chip RAM because the upper eight bits of

SAR and DAR are assumed as all 1s.

Reserved

(0 write)

Reserved

(0 write)

Lower addresses

Transfer information

in normal operation

Transfer

information

for one transfer

(4 longwords)

Transfer

information

for the 2nd

transfer

in chain transfer

(4 longwords)

Transfer

information

for one transfer

(3 longwords)

Transfer

information

for the 2nd

transfer

in chain transfer

(3 longwords)

Start

address

4 bytes

Chain

transfer

Start

address

Chain

transfer

Note:

Figure 8.2 Transfer Information on Data Area

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