SH7243 datasheet(294/1726 Pages) RENESAS

294 / 1726 page

Section 9 Bus State Controller (BSC)

Rev. 1.00 Jun. 26, 2008 Page 264 of 1692

REJ09B0393-0100

Note:

Details of Initial value of this bit are shown below according to the product and MCU

operating mode.

Mode

SH7243

SH7285

SH7286

Mode 0

Mode 1

Mode 2

Mode 3

9.4.3

CSn Space Wait Control Register (CSnWCR) (n = 0 to 7)

CSnWCR specifies various wait cycles for memory access. The bit configuration of this register

varies as shown below according to the memory type (TYPE2 to TYPE0) specified by the CSn

space bus control register (CSnBCR). Specify CSnWCR before accessing the target area. Specify

CSnBCR first, then specify CSnWCR.

CSnWCR is initialized to H'00000500 by a power-on reset and retains the value by a manual reset

and in software standby mode.

(1)

Normal Space, SRAM with Byte Selection, MPX-I/O

• CS0WCR

Bit:

Initial value:

R/W:

Bit:

Initial value:

R/W:

0000000000000000

R/W

0000010100000000

R/W

-----------

BAS

----

SW[1:0]

WR[3:0]

HW[1:0]

Bit

Bit Name

Initial

Value

R/W

Description

31 to 21

 *

All 0

R/W

Reserved

These bits are always read as 0. The write value

should always be 0.

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