SH7721 datasheet(58/1524 Pages) RENESAS

58 / 1524 page

Rev. 3.00 Jan. 18, 2008 Page lviii of lxii

Table 21.2

Operation in Each Transfer Mode......................................................................... 685

Table 21.3

SIOF Serial Clock Frequency ............................................................................... 710

Table 21.4

Serial Transfer Modes........................................................................................... 713

Table 21.5

Frame Length........................................................................................................ 714

Table 21.6

Audio Mode Specification for Transmit Data....................................................... 716

Table 21.7

Audio Mode Specification for Receive Data ........................................................ 716

Table 21.8

Setting Number of Channels in Control Data ....................................................... 717

Table 21.9

Conditions to Issue Transmit Request .................................................................. 719

Table 21.10

Conditions to Issue Receive Request .................................................................... 720

Table 21.11

Transmit and Receive Reset.................................................................................. 725

Table 21.12

SIOF Interrupt Sources ......................................................................................... 727

Section 22 Analog Front End Interface (AFEIF)

Table 22.1

Pin Configuration.................................................................................................. 736

Table 22.2

FIFO Interrupt Size............................................................................................... 738

Table 22.3

Telephone Number and Data ................................................................................ 745

Section 23 USB Pin Multiplex Controller

Table 23.1

Pin Configuration (Digital Transceiver Signal) .................................................... 756

Table 23.2

Pin Configuration (Analog Transceiver Signal) ................................................... 756

Table 23.3

Pin Configuration (Power Control Signal)............................................................ 757

Table 23.4

Pin Configuration (Clock Signal) ......................................................................... 757

Section 24 USB Host Controller (USBH)

Table 24.1

Pin Configuration.................................................................................................. 766

Section 25 USB Function Controller (USBF)

Table 25.1

Pin Configuration and Functions .......................................................................... 805

Table 25.2

Restrictions of Settable Values ............................................................................. 834

Table 25.3

Example of Endpoint Configuration..................................................................... 834

Table 25.4

Example of Setting of Endpoint Configuration Information ................................ 835

Table 25.5

Command Decoding on Application Side ............................................................ 855

Section 26 LCD Controller (LCDC)

Table 26.1

Pin Configuration.................................................................................................. 865

Table 26.2

I/O Clock Frequency and Clock Division Ratio ................................................... 868

Table 26.3

Limits on the Resolution of Rotated Displays, Burst Length,

and Connected Memory (32-bit SDRAM)............................................................ 899

Table 26.4

Limits on the Resolution of Rotated Displays, Burst Length,

and Connected Memory (16-bit SDRAM)............................................................ 902

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