SH7721 datasheet(21/1524 Pages) RENESAS

21 / 1524 page

Rev. 3.00 Jan. 18, 2008 Page xxi of lxii

18.5

Interrupt Sources and DMAC ............................................................................................ 635

18.6

Usage Notes ....................................................................................................................... 637

Section 19 Infrared Data Association Module (IrDA).........................................639

19.1

Features.............................................................................................................................. 639

19.2

Input/Output Pins ...............................................................................................................640

19.3

Register Description........................................................................................................... 640

19.3.1 IrDA Mode Register (SCIMR) ............................................................................. 640

19.4

Operation ........................................................................................................................... 642

19.4.1 Transmitting.......................................................................................................... 642

19.4.2 Receiving .............................................................................................................. 642

19.4.3 Data Format Specification .................................................................................... 643

Section 20 I

2C Bus Interface (IIC) .......................................................................645

20.1

Features.............................................................................................................................. 645

20.2

Input/Output Pins ...............................................................................................................648

20.3

Register Descriptions ......................................................................................................... 648

20.3.1 I

2C Bus Control Register 1 (ICCR1)..................................................................... 649

20.3.2 I

2C Bus Control Register 2 (ICCR2)..................................................................... 650

20.3.3 I

2C Bus Mode Register (ICMR)............................................................................ 651

20.3.4 I

2C Bus Interrupt Enable Register (ICIER) ........................................................... 653

20.3.5 I

2C Bus Status Register (ICSR)............................................................................. 655

20.3.6 Slave Address Register (SAR).............................................................................. 657

20.3.7 I

2C Bus Transmit Data Register (ICDRT)............................................................. 658

20.3.8 I

2C Bus Receive Data Register (ICDRR).............................................................. 658

20.3.9 I

2C Bus Shift Register (ICDRS)............................................................................ 658

20.3.10 I

2C Bus Master Transfer Clock Select Register (ICCKS)..................................... 658

20.4

Operation ........................................................................................................................... 660

20.4.1 I

2C Bus Format...................................................................................................... 660

20.4.2 Master Transmit Operation ................................................................................... 661

20.4.3 Master Receive Operation..................................................................................... 663

20.4.4 Slave Transmit Operation ..................................................................................... 665

20.4.5 Slave Receive Operation....................................................................................... 667

20.4.6 Noise Canceller..................................................................................................... 670

20.4.7 Example of Use..................................................................................................... 670

20.5

Interrupt Request................................................................................................................ 675

20.6

Bit Synchronous Circuit..................................................................................................... 676

20.7

Usage Notes ....................................................................................................................... 677

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