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7733 Datasheet(PDF) 348 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 348 Page - Renesas Technology Corp |
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348 / 940 page  CONNECTING EXTERNAL DEVICES 7733 Group User’s Manual 12–23 When “L” level which is input to pin HOLD is accepted, the address which was output immediately before is output again, instead of a new address. Address A External address bus/ External data bus External data bus Data length External data bus width Software wait 8 16 8,16 16 (When accessed starting from even address) Wait 1 In use q State when “L” level is input to pin HOLD ALE E HLDA HOLD R/W Address A Address B 1 ! 1 1 ! 1 Hold state Sampling timing Bus is in use. <<When “L” level is input to pin HOLD while bus is in use (2)>> External address bus Clock 1 Data Floating Floating Floating Bus is in use. BHE Fig. 12.4.4 Timing when hold state is accepted and terminated (3) 12.4 Hold function |
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