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7733 Datasheet(PDF) 355 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 355 Page - Renesas Technology Corp |
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355 / 940 page  RESET 7733 Group User’s Manual 13–4 13.1 Hardware reset 13.1.2 State of CPU, SFR area, and internal RAM area Figure 13.1.2 shows the state of the CPU registers immediately after reset. Figures 13.1.3 to 13.1.6 show the state of the SFR area and internal RAM area immediately after reset. Fig. 13.1.2 State of CPU registers immediately after reset Processor status register (PS) 0 00 0 00 0 0 00 0 1 b7 b0 b15 b8 NV mx D IZ C IPL ? ?? ? 0 1 ? : “0” immediately after reset. : “1” immediately after reset. : Undefined immediately after reset. : Nothing is allocated. Always “0” at reading Contents of address FFFE16 Contents of address FFFF16 0016 0016 Direct page register (DPR) b7 b0 b15 b8 Program counter (PC) b7 b0 b15 b8 Program bank register (PG) b7 b0 Data bank register (DT) b7 b0 0 Register name State immediately after reset 0016 0016 |
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