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7733 Datasheet(PDF) 444 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 444 Page - Renesas Technology Corp |
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444 / 940 page ![]() APPLICATIONS 7733 Group User’s Manual 17–37 Fig. 17.2.14 Approximate flowchart (3) 17.2 Serial I/O Flag used to determine whether a data reception error has occurred or not = “0” Confirmed receive data is stored in [REC_DATA] [F_ERROR] “0” 0: No error is found. 1: Error is found. Whether data has been correctly received or not is determined. [F_ERROR]: Flag used for determination of data reception error [WORK_RAM]: RAM where receive data is temporarily stored [REC_DATA]: RAM where confirmed receive data is stored [F_DATAIN]: Flag used to determine whether a reception interrupt request has occurred or not [REC_DATA] [WORK_RAM] 0: No error is found. (Note) [WORK_RAM] UART1 receive buffer register (address 3E16) [F_DATAIN] “1” Flag used to determine whether a reception interrupt request has occurred or not = “1” Register return processing RTI Register save processing UART1 reception interrupt routine Error sum flag? (bit 7 at address 3D16) Overrun error flag? (bit 4 at address 3D16) 1: Error is found. [F_ERROR] “1” Reception enable bit “0” ( bit 2 at address 3D16) All of error flags = “0” (Reception is disabled.) Receive data is temporarily stored in [WORK_RAM] Framing error flag = “0” Parity error flag = “0” If the next data is received from when the error sum flag is checked until the contents of the UART1 receive buffer register is transferred to [WORK_RAM], an overrun error occurs. Therefore, at this timing, the content of the overrun error flag is checked again. Note: Flag used to determine whether a data reception error has occurred or not = “1” |
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