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7733 Datasheet(PDF) 449 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 449 Page - Renesas Technology Corp |
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449 / 940 page  APPLICA TIONS 7733 Group User’s Manual 17–42 (3) Approximate flowchart 17.3 Watchdog timer Fig. 17.3.2 Approximate flowchart Watchdog timer register 8-bit dummy data (address 6016) Main routine Watchdog timer is initialized. Watchdog timer’s value: FFF 16 (Note 1) Watchdog timer interrupt routine Software reset bit “1 ” (bit 3 at address 5E 16) RTI Watchdog timer interrupt request occurs. (Detection of a program runaway) (Note 2) Microcomputer is resset. Notes 1: The watchdog timer is initialized again from when the watchdog timer is initialized until the most significant bit of the watchdog timer becomes “0,” in other words, until a watchdog timer interrupt request occurs. 2: When a program runaway occurs, there is a possibility that values of data bank register (DT), direct page register (DPR), and others are incorrect. When accessing the software reset bit by using an addressing mode which uses DT, DPR, and others, be sure to set values of DT, DPR, and others again. |
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