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7733 Datasheet(PDF) 538 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 538 Page - Renesas Technology Corp |
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538 / 940 page ![]() EXTERNAL ROM VERSION 7733 Group User’s Manual 20–22 20.7 Timer A Fig. 20.7.9 Initial setting example for registers related to pulse output port mode (3) Counting is started. Setting of the count start flag to “1” b7 b0 Count start flag (address 40 16) Timer A0 count start flag Timer A1 count start flag ( Note) Timer A2 count start flag Timer A3 count start flag ( Note) Setting of the waveform output mode register b7 b0 Waveform output mode register (address 6216) Continued from "Initial setting example for registers related to pulse output port mode (2)" on the preceding page 0 Setting of the interrupt priority level b7 b0 Timer A0 interrupt control register (address 75 16) Timer A1 interrupt control register (address 76 16) (Note) Timer A2 interrupt control register (address 77 16) Timer A3 interrupt control register (address 78 16) (Note) Interrupt priority level selection bits When using interrupts, one of levels 1-7 must be set. When disabling interrupts, level 0 must be set. Note: This is used when the pulse width is modulated. 0 Waveform output selection bits 0 0: Port P5 is a programmable I/O port. 0 1: RTP1 is selected. 1 0: RTP0 is selected. 1 1: RTP0 and RTP1 are selected. b1 b0 Polarity selection bit (Affective only for RTP0) 0: Positive polarity 1: Negative polarity Pulse width modulation selection bit by timer A1 0: Not modulated 1: Modulated Pulse width modulation selection bit by timer A3 0: Not modulated 1: Modulated Note: This is used when the pulse width is modulated. |
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