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7733 Datasheet(PDF) 535 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 535 Page - Renesas Technology Corp |
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535 / 940 page ![]() EXTERNAL ROM VERSION 7733 Group User’s Manual 20–19 20.7 Timer A Fig. 20.7.6 Structures of pulse output data registers 0, 1 b7 b6 b5 b4 b3 b2 b1 b0 4 to 7 Not implemented. At reset Undefined Undefined Undefined Undefined Undefined RW 1 RTP11 output data bit 0 RTP10 output data bit Bit name Functions 3 RTP13 output data bit Bit 2 RTP12 output data bit WO WO WO WO – Pulse output data register 1 (address 1C 16) 0: “L” level is output. 1: “H” level is output. Note: Use the LDM and STA instructions to set bits 0 to 3. b7 b6 b5 b4 b3 b2 b1 b0 4 to 7 Not implemented. At reset Undefined Undefined Undefined Undefined Undefined RW 1 RTP01 output data bit 0 RTP00 output data bit Bit name Functions 3 RTP03 output data bit Bit 2 RTP02 output data bit WO WO WO WO – Pulse output data register 1 (address 1D 16) When the positive polarity is selected, 0: “L” level is output. 1: “H” level is output. When the negative polarity is selected, 0: “H” level is output. 1: “L” level is output. Note: Use the LDM and STA instructions to set bits 0 to 3. |
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