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7733 Datasheet(PDF) 532 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 532 Page - Renesas Technology Corp |
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532 / 940 page ![]() EXTERNAL ROM VERSION 7733 Group User’s Manual 20–16 20.7 Timer A Fig. 20.7.3 Structures of timer A0, A2 mode registers and timer A0, A2 registers in pulse output port mode X: It may be either “0” or “1.” 3 Gate function selection bits 2 Pulse output function selection bit 1 0 Operating mode selection bits Bit name Functions b7 b6 b5 b4 b3 b2 b1 b0 Timer A0 mode register (address 56 16) 0 0: Timer mode 1: Pulse is output. Must be fixed to “1.” 7 0 0: Clock f2 0 1: Clock f16 1 0: Clock f64 1 1: Clock f512 b7 b6 6 Count source selection bits b1 b0 b4 b3 5 Must be fixed to “0” in the timer mode. 00 0 0 0: 0 1: Bit 4 At reset 0 0 0 0 0 0 0 0 RW b7 b0 b7 b0 (b15) (b8) Timer A0 register (addresses 47 16, 4616) Timer A2 register (addresses 4B 16, 4A16) Functions Bit At reset RW 15 to 0 Values 000016 to FFFF16 can be set. Assuming that the set value = n, counter divides the count source frequency by (n + 1). At reading this register, the counter value is read out. Undefined RW RW RW RW RW RW RW RW RW Timer A2 mode register (address 58 16) No gate function Bit 4 must be fixed to “0.” 1 0 ! |
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