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7733 Datasheet(PDF) 531 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 531 Page - Renesas Technology Corp |
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531 / 940 page  EXTERNAL ROM VERSION 7733 Group User’s Manual 20–15 20.7 Timer A Fig. 20.7.2 Port P5 output control circuit q P50/TA0OUT/RTP00, P52/TA1OUT/RTP02, P54/TA2OUT/RTP10, P56/TA3OUT/RTP12 Direction register Port latch Pulse output Timer A output Bit 2 of the timer Ai mode register (addresses 56 16 to 5916) (Note 2) (Whether to output a pulse or not is selected.) Bits 0 and 1 of the waveform output mode register (address 6216) (Note 1) (RTP1, RTP0 selected) Input q P51/TA0IN/RTP01, P53/TA1IN/RTP03, P55/TA2IN/RTP11, P57/TA3IN/RTP13 Bits 0 and 1 of the waveform output mode register (Note 1) (RTP1, RTP0 selected) Input Direction register Port latch Pulse output Notes 1: Ports P50 to P53 correspond to bit 1. Ports P5 4 to P57 correspond to bit 0. 2: Bit 2 of the timer Ai mode register which corresponds to each port “1” “1” “0” “0” “1” “1” “0” “0” “1” “0” “1” “0” |
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