7733 datasheet(527/940 Pages) RENESAS

527 / 940 page

EXTERNAL ROM VERSION

7733 Group User’s Manual

20–11

Fig. 20.6.1 Structure of processor mode register 0

Bit

Bit name

Functions

At reset

Processor mode bits ( Note)

Wait bit

Software reset bit

Interrupt priority detection

time selection bits

Must be fixed to “0.”

This bit is ignored.

0 0: Do not select.

0 1: Do not select.

1 0: Microprocessor mode

1 1: Do not select.

Microcomputer is reset by

setting this bit to “1.”

This bit is “0” at reading.

0 0: 7 cycles of

0 1: 4 cycles of

1 0: 2 cycles of

1 1: Do not select.

b1 b0

b5 b4

Processor mode register 0 (address 5E 16)

represents that bits 2 to 7 are not used for setting the processor mode.

!: It may be “0” or “1.”

Note: Fix the processor mode bits to “10 2.”

0: Software wait is inserted when

accessing external area.

1: No software wait is inserted when

accessing external area.

20.6 Processor modes

The M37733S4BFP can operate only in the microprocessor mode. For the processor mode, refer to the

description of the microprocessor mode in section “2.5 Processor modes.”

Also, be sure to set as follows:

• Connect pin CNVss to Vcc.

• Fix the processor mode bits to “102.“

Figure 20.6.1 shows the structure of the processor mode register 0.

20.6 Processor modes

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